DESCRIPTION

· The 74AUP1G57 is a single, 3-input positive configurable multiple-function gate with a standard push-pull output.

· The output state is determined by eight patterns of 3-bit input, allowing the user to choose logic functions such as AND, OR, NAND, NOR, XNOR, inverter, or non-inverting buffer.

· Designed for operation with a power supply range of 0.8V to 3.6V, with inputs tolerant to 3.6V for mixed voltage environments.

· Fully specified for partial power-down applications using IOFF, which disables the output to prevent damaging current backflow.

FEATURES

· Advanced Ultra Low-Power (AUP) CMOS technology.

· Supply voltage range from 0.8V to 3.6V with ±4mA output drive at 3.0V.

· Low static power consumption (IC < 0.9µA) and low dynamic power consumption (CPD = 4.8pF typical at 3.6V).

· Schmitt trigger action at all inputs, with a typical hysteresis of 950mV at VCC = 3.0V.

· IOFF supports partial-power-down mode operation.

· ESD protection exceeds 200V Machine Model, 2000V Human Body Model, and 1000V Charged Device Model.

· Latch-up exceeds 100mA per JESD 78, Class I.

· Available in standard SOT26, SOT363, and leadless DFN packages.

· Totally lead-free, fully RoHS compliant, and halogen and antimony-free "Green" device.

APPLICATIONS

· Suitable for battery and low-power needs, voltage level shifting, and general-purpose logic.

· Power down signal isolation and wide array of products including PCs, networking devices, notebooks, netbooks, PDAs, tablet computers, e-readers, computer peripherals, hard drives, CD/DVD ROMs, TVs, DVDs, DVRs, set-top boxes, cell phones, personal navigation/GPS devices, MP3 players, cameras, and video recorders.