DESCRIPTION

· The 74AUP1G97 is a single, 3-input positive configurable multiple function gate with a standard push-pull output.

· The output state is determined by eight patterns of 3-bit input.

· It can simulate several types of logic gates including MUX, AND, OR, NAND, NOR, inverter, or non-inverting buffer.

· Designed for operation with a power supply range of 0.8V to 3.6V, with inputs tolerant to 3.6V for mixed voltage environments.

· Fully specified for partial power down applications using IOFF to prevent damaging current backflow when powered down.

FEATURES

· Advanced Ultra Low-Power (AUP) CMOS technology.

· Supply voltage range from 0.8V to 3.6V with ±4mA output drive at 3.0V.

· Low static and dynamic power consumption; IC < 0.9µA, CPD = 4.8 pF typical at 3.6V.

· Schmitt trigger action at all inputs for tolerance to slower input rise and fall times; hysteresis typically 950mV at VCC = 3.0V.

· IOFF supports partial-power-down mode operation.

· ESD protection exceeds JESD 22 standards: 200-V Machine Model, 2000-V Human Body Model, 1000-V Charged Device Model.

· Latch-up exceeds 100mA per JESD 78, Class I.

· Available in standard SOT26 and SOT363 packages, and leadless packages per JESD30E.

· Totally lead-free, fully RoHS compliant, halogen and antimony free "Green" device.

APPLICATIONS

· Suited for battery and low power needs, voltage level shifting, and general purpose logic.

· Power down signal isolation.

· Wide array of products including PCs, networking, notebooks, netbooks, PDAs, tablet computers, e-readers, computer peripherals, hard drives, CD/DVD ROMs, TVs, DVDs, DVRs, set-top boxes, cell phones, personal navigation/GPS, MP3 players, cameras, and video recorders.