1. Device Overview:
The dsPIC33CH128MP505-E/PT is a member of the dsPIC33CH128MP508 family, which are 28/36/48/64/80-pin dual-core, 16-bit Digital Signal Controllers (DSCs) with High-Resolution PWM and CAN Flexible Data (CAN FD). These devices are designed for high-performance digital signal processing and feature extensive DSP functionality integrated with a 16-bit MCU architecture.

2. Core Features:

• Dual 16-Bit dsPIC33CH CPU cores with independent operation and separate programming.
• Master Core operates at DC to 90 MIPS, and Slave Core at DC to 100 MIPS under certain temperature and voltage conditions.
• Each core has independent peripherals and shared resources configurable through the Master Slave Interface (MSI).

3. Memory:

• Master Core: 64K-128 Kbytes of Program Flash with ECC and 16K RAM.
• Slave Core: 24 Kbytes of Program RAM (PRAM) with ECC and 4K Data Memory RAM.

4. Clock Management:

• Internal Oscillator and Programmable PLLs for clock sources.
• Master and Slave Reference Clock Outputs.
• Fail-Safe Clock Monitor (FSCM) for system stability.

5. Power Management:

• Low-Power Modes including Sleep, Idle, and Doze.
• Integrated Power-on Reset and Brown-out Reset.

6. High-Resolution PWM:

• Up to 12 PWM Channels with 250 ps resolution.
• Applications include DC/DC Converters, AC/DC power supplies, UPS, and Motor Control systems.