DESCRIPTION

· The ETC5057/ETC5054 family includes A-law and µ-law monolithic PCM CODEC/filters with A/D and D/A conversion architecture and a serial PCM interface.
· Fabricated using double-poly CMOS process.
· Encode portion: input gain adjust amplifier, active RC pre-filter, switched-capacitor band-pass filter, auto-zero circuitry, and companding coder.
· Decode portion: expanding decoder, low-pass filter, and single-ended power amplifier.
· Requires master clocks (1.536 MHz, 1.544 MHz, or 2.048 MHz), bit clocks (64 kHz to 2.048 MHz), and frame sync pulses.
· Timing compatible with industry standard formats.

FEATURES

· Transmit high-pass and low-pass filtering.
· Receive low-pass filter with sin x/x correction.
· Active RC noise filters.
· µ-law or A-law compatible COder and DECoder.
· Internal precision voltage reference.
· Serial I/O interface.
· Internal auto-zero circuitry.
· Meets or exceeds D3/D4 and CCITT specifications.
· ±5V operation.
· Low operating power: typically 60 mW.
· Power-down standby mode: typically 3 mW.
· Automatic power-down.
· TTL or CMOS compatible digital interfaces.
· Maximizes line interface card circuit density.
· 0 to 70°C operation.

APPLICATIONS

· Suitable for use in line interface cards.
· Ideal for systems requiring PCM CODEC/filters.
· Applicable in telecommunications and data communication systems.
· Can be used in devices requiring A-law or µ-law companding.