DESCRIPTION

· 1Gb DDR3/DDR3L SDRAM with 64M x 16-bit organization.

· High-speed double-data-rate architecture with up to 1866 Mb/sec/pin transfer rate.

· Internally configured as an eight-bank DRAM with 8Mbit x 16 I/Os x 8 banks.

· Fully compliant with DDR3L DRAM key features and backward compatible with DDR3.

· Operates with a single +1.35V power supply and available in BGA packages.

FEATURES

· JEDEC and AEC-Q100 compliant.

· Power supplies: VDD & VDDQ = +1.35V, backward compatible to +1.5V ±0.075V.

· Operating temperature ranges: ET (0~95°C), IT (-40~95°C), AT (-40~105°C).

· Supports JEDEC clock jitter specification and fully synchronous operation.

· Fast clock rates: 800/933MHz with differential clock (CK & CK#).

· Bidirectional differential data strobe (DQS & DQS#) and 8 internal banks for concurrent operation.

· 8n-bit prefetch architecture, pipelined internal architecture, and programmable mode registers.

· Programmable burst lengths: 4, 8 with sequential/interleave burst types.

· Output driver impedance control, write leveling, and ZQ calibration.

· Dynamic ODT (Rtt_Nom & Rtt_WR), RoHS compliant, and auto/self-refresh functions.

· 96-ball 7.5 x 13 x 1.0mm FBGA package, Pb and halogen-free.

APPLICATIONS

· Suitable for high-speed data transfer in general applications.

· Ideal for industrial and automotive environments due to extended temperature ranges.

· Compatible with systems requiring DDR3/DDR3L memory standards.