DESCRIPTION

· The PI90LVx386 family consists of sixteen differential line receivers with 3-state outputs implementing Low-Voltage Differential Signaling (LVDS).

· Valid logical output state is provided with a ±100mV differential input voltage within the 0 to 3V common-mode range.

· Independent EN pins control output states: normal logic or high-impedance.

· Designed for point-to-point baseband data transmission over controlled impedance media of approximately 100-ohms.

· Transmission media can be PCB traces, backplanes, or cables.

· Operates from –40°C to 85°C.

FEATURES

· Sixteen line receivers meet or exceed ANSI TIA/EIA-644-1995 Standard.

· Signaling rates up to 660 Mbps.

· 0V to 3V common-mode input voltage range.

· Operates from a single 3.3V supply.

· Typical propagation delay time: 2.6ns.

· Output skew: 100ps (typical), part-to-part skew <1ns.

· Integrated 110-Ohm termination on PI90LVT386.

· LVTTL levels are 5V tolerant.

· Open-circuit fail safe.

· Flow-through pin out.

· Packaging: 64-Pin Thin Shrink Small Output TSSOP (Pb-free & Green available).

APPLICATIONS

· Point-to-point baseband data transmission.

· Controlled impedance media (e.g., PCB traces, backplanes, cables).

· High-speed data communication systems.