DESCRIPTION

· The SiT92211 is a 2.1 GHz, 10-output low-jitter clock fan-out buffer designed for high-frequency clock/data distribution and level translation.
· It supports primary, secondary, or crystal clock inputs, with primary and secondary sources accepting single-ended or differential signals.
· The selected clock is distributed to two output banks (A, B) and one LVCMOS output.
· Crystal input supports 8 MHz to 50 MHz crystals or single-ended clocks.
· Output drivers can be independently programmed to LVPECL, LVDS, HCSL, or HIZ mode.
· The LVCMOS output is synchronized and can be enabled/disabled glitch-free.
· Operates with a 3.3 V/2.5 V core supply and three independent 3.3 V/2.5 V output supplies.
· LVCMOS output can operate at 1.8 V.

FEATURES

· Additive jitter performance of 55 fs RMS.
· 3:1 input clock selection.
· Two universal clock inputs support up to 2.1 GHz and accept LVPECL, LVDS, LVCMOS, CML (AC-coupled), HCSL, SSTL, or single-ended clocks.
· Crystal input supports 8 MHz to 50 MHz crystals or single-ended clocks.
· Two output banks (A, B) can be programmed to LVPECL, LVDS, HCSL, or HIZ mode.
· Typical output skew of 30 ps.
· Level translation with 3.3 V/2.5 V core and output supplies.
· LVCMOS output operates at 3.3 V/2.5 V/1.8 V.
· Pin-controlled operation.
· High PSRR: -70 dBc (LVPECL), -73 dBc (LVDS).
· Available in a 48-pin, 7mm x 7mm QFN package.
· Supports PCIe Gen1 to Gen5.

APPLICATIONS

· High-frequency clock distribution in low-jitter systems.
· Level translation for clock and data signals.
· Applications requiring precise clock synchronization.
· PCIe Gen1 to Gen5 compliant systems.
· Systems with mixed signal level requirements.