DESCRIPTION

· Multichannel clock distribution circuit with 2, 3, or 4 output buffers.

FEATURES

· Supports single-ended square wave or sine wave clock input.

· Rail-to-rail square wave output (0 V to VTCXO).

· Individual enable pin for each output.

· 1.8 V LDO with high PSRR for external clock source voltage supply.

· No AC coupling capacitor required.

· Ultra-low phase noise and standby current.

· Common system clock request with open drain, active low.

· Factory programmable clock enable signal polarities (STCD23x0).

· User configurable clock enable polarities via option pins (STCD22x0 and STCD24x0).

· High isolation between output-to-output and output-to-input.

· Battery supply voltage range from 2.5 V to 5.1 V.

· Maximum load driving capability of 40 pF per output.

· Available in chip scale package (CSP).

· Operating temperature range: -20 °C to 85 °C.

APPLICATIONS

· Multimode RF clock reference.

· Baseband peripheral device clock reference.

· Mobile Internet Devices (MIDs).