DESCRIPTION

· The V320 is an 8-bit universal bus transceiver optimized for high-speed interfacing with the VME320 backplane.

· It features output characteristics designed for driving large capacitive loads and modified input levels for enhanced noise immunity and reduced input skew.

· The device includes bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry for multiplexed data transmission from the input bus or internal registers.

· Data on the A or B bus is clocked into registers on the rising edge of the clock signal.

· Control pins (OE and direction) manage the transceiver function, allowing data storage in either or both registers and multiplexing of stored and real-time data.

· In isolation mode, data can be stored between registers without affecting the bus.

FEATURES

· Independent registers for A and B buses.

· Multiplexed real-time and stored data transmission.

· Guaranteed output skew and MOS specifications.

· Output switching specified for 50 pF, 250 pF, and 500 pF loads.

· Guaranteed simultaneous switching noise level and dynamic threshold performance.

· Glitch-free power up/down high impedance for live insertion.

· BiCMOS technology for high drive and low power dissipation.

· Operates in commercial temperature range (-40°C to 85°C) with VCC specifications.

· Modified specifications across VCC and temperature for realistic system conditions.

· Available in TSSOP (MTC) package.

APPLICATIONS

· High-speed interfacing with VME320 backplane.

· Systems requiring robust noise immunity and reduced input skew.

· Applications needing multiplexed data transmission and storage.

· Environments with large capacitive loads and dynamic switching requirements.

· Live insertion scenarios requiring glitch-free power transitions.