DESCRIPTION

· The 74AUP1G04 is a low voltage CMOS single inverter gate designed for 1.2 to 3.6 V operations, utilizing sub-micron silicon gate and double-layer metal wiring C2MOS technology.

· It is optimized for low power and low noise applications, with all inputs and outputs protected against static discharge, offering 2kV ESD immunity and transient excess voltage protection.

FEATURES

· High speed operation with a maximum propagation delay (tPD) of 4.3 ns at VCC = 2.3 V.

· Power down protection on inputs and outputs ensures safety during power transitions.

· Balanced propagation delays with tPLH approximately equal to tPHL.

· Wide operating voltage range from 1.2 V to 3.6 V.

· Low power dissipation, with ICC max of 1 µA at TA = 85 °C.

· High latch-up performance exceeding 300 mA (JESD 78, Class II).

· Robust ESD performance: 2000-V Human-Body Model, 200-V Machine Model, and 1000-V Charged-Device Model.

APPLICATIONS

· Mobile phones.

· Personal digital assistants (PDAs).