DESCRIPTION

· The 74HC595 is an 8-bit serial-input/serial or parallel-output shift register with latched 3-state outputs.

· It includes an 8-bit shift register and an 8-bit D-type latch with three-state parallel outputs.

· The device accepts serial data, provides serial output, and transfers parallel data to the latch.

· It features independent clock inputs for the shift register and latch, and an asynchronous reset for the shift register.

· It interfaces directly with the SPI serial data port on CMOS MPUs and MCUs.

FEATURES

· Output drive capability: 15 LSTTL loads.

· Outputs directly interface with CMOS, NMOS, and TTL.

· Operating voltage range: 2.0 to 6.0 V.

· Low input current: 1.0 µA.

· High noise immunity characteristic of CMOS devices.

· Compliant with JEDEC Standard No. 7A.

· ESD performance: HBM 2000 V; Machine Model 200 V.

· Chip complexity: 328 FETs or 82 equivalent gates.

· Improvements over HC595: improved propagation delays, 50% lower quiescent power, improved input noise, and latchup immunity.

· Pb-free device.

APPLICATIONS

· Suitable for use in serial-to-parallel data conversion.

· Ideal for interfacing with SPI serial data ports on CMOS MPUs and MCUs.

· Can be used in applications requiring high noise immunity and low power consumption.

· Suitable for driving multiple loads in digital systems.