DESCRIPTION

· The ADC08D500 is a dual, low-power, high-performance CMOS analog-to-digital converter.

· It digitizes signals to 8-bit resolution at sampling rates up to 500 MSPS.

· Consumes typically 1.4 Watts at 500 MSPS from a single 1.9 Volt supply.

· Ensures no missing codes over the full operating temperature range.

· Features a unique folding and interpolating architecture, fully differential comparator design, and innovative internal sample-and-hold amplifier.

· Provides a high 7.5 ENOB with a 250 MHz input signal and a 500 MHz sample rate.

· Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996.

FEATURES

· Internal Sample-and-Hold.

· Single +1.9V ±0.1V Operation.

· Choice of SDR or DDR Output Clocking.

· Interleave Mode for 2x Sampling Rate.

· Multiple ADC Synchronization Capability.

· Ensured No Missing Codes.

· Serial Interface for Extended Control.

· Fine Adjustment of Input Full-Scale Range and Offset.

· Duty Cycle Corrected Sample Clock.

APPLICATIONS

· Direct RF Down Conversion.

· Digital Oscilloscopes.

· Satellite Set-Top Boxes.

· Communications Systems.

· Test Instrumentation.