DESCRIPTION

· The CDCLVP111-SP is a low-voltage 1:10 LVPECL clock driver with a selectable input clock.

· It distributes one differential clock input pair (LVPECL) to ten differential LVPECL outputs with minimal skew.

· Designed for driving 50-Ω transmission lines, it supports a wide supply voltage range from 2.375 V to 3.8 V.

· It features a VBB reference voltage output for single-ended clocking and is characterized for operation from -55°C to 125°C.

FEATURES

· Distributes one differential LVPECL clock input pair to ten differential LVPECL outputs.

· Fully compatible with LVECL and LVPECL standards.

· Supports a wide supply voltage range from 2.375 V to 3.8 V.

· Selectable clock input through CLK_SEL.

· Low-output skew (typically 15 ps) for clock-distribution applications.

· Additive jitter less than 1 ps and propagation delay less than 355 ps.

· Open input default state and compatible with LVDS, CML, SSTL inputs.

· Frequency range from DC to 3.5 GHz.

· Supports defense, aerospace, and medical applications with controlled baseline, one assembly and test site, one fabrication site, and extended product life cycle.

APPLICATIONS

· High-performance clock distribution.

· Designed for driving 50-Ω transmission lines.

· Suitable for defense, aerospace, and medical applications.

· Engineering evaluation samples are available for testing purposes.