DESCRIPTION

· High-speed, low-power FIFO memories with clocked read and write interfaces.

· Available in 16K × 9 (CY7C4261) and 32K × 9 (CY7C4271) configurations.

· Pin compatible with CY7C42X1 Synchronous FIFO family and IDT72201/11/21/31/41/51.

· Supports cascading for width expansion and depth expansion.

· Suitable for high-speed data acquisition, multiprocessor interfaces, and communications buffering.

FEATURES

· High-speed operation up to 100 MHz with 10 ns read/write cycle times.

· Low power consumption with ICC = 35 mA.

· Fully asynchronous and simultaneous read and write operations.

· Programmable Almost Empty and Almost Full status flags.

· TTL compatible with Output Enable (OE) pins.

· Independent read and write enable pins for flexible control.

· Center power and ground pins for reduced noise.

· Supports free-running 50% duty cycle clock inputs.

· Available in Pb-Free packages and military temp SMD offering (CY7C4271-15LMB).

APPLICATIONS

· High-speed data acquisition systems.

· Multiprocessor interfaces.

· Communications buffering.

· Data buffering in various electronic systems.