DESCRIPTION

· The DS90LV110A is a 1 to 10 data/clock distributor utilizing LVDS technology for low power, high-speed operation.

· It features a fully differential data path from input to output, minimizing noise generation and pulse width distortion.

· The device supports a single +3.3V supply and is designed for high-speed differential signal distribution with a 100Ω termination load.

· It can be used in point-to-point interconnects, multi-drop bus applications, and clock distribution up to 200MHz.

· The LVDS outputs can be put into TRI-STATE using the enable pin.

FEATURES

· Low jitter, 400Mbps fully differential data path with 145ps (typ) of pk-pk jitter.

· Balanced output impedance LVDS I/O for high-speed data transmission.

· Output channel-to-channel skew is 35ps (typ).

· Differential output voltage (VOD) is 320mV (typ).

· Fast propagation delay of 2.8ns (typ).

· LVDS receiver inputs accept LVPECL signals.

· Conforms to ANSI/TIA/EIA-644 LVDS standard.

· Available in a 28-lead TSSOP package.

APPLICATIONS

· High-speed differential 1 to 10 signal distribution.

· Replacement for multi-drop bus applications to improve signal quality in higher speed links.

· Clock distribution up to 200MHz.

· Suitable for point-to-point interconnects and high-speed data transmission environments.