DESCRIPTION

· The FIN1026 is a 3.3V LVDS 2-bit high-speed differential receiver designed for high-speed interconnects using LVDS technology.
· It translates LVDS levels to LVTTL signal levels with a typical differential input threshold of 100mV.
· Ideal for high-speed clock and data transfer, it can be paired with the FIN1025 driver or any other LVDS driver.

FEATURES

· Supports data rates greater than 400Mbps.
· Flow-through pinout simplifies PCB layout.
· Operates on a 3.3V power supply.
· Maximum differential pulse skew of 0.4ns.
· Maximum propagation delay of 2.5ns.
· Low power dissipation.
· Power-Off and Fail-Safe protection for open-circuit, shorted, and terminated non-driven input conditions.
· Complies with TIA/EIA-644 LVDS standard.
· Compact 14-Lead TSSOP package.

APPLICATIONS

· High-speed data and clock signal transmission.
· Low EMI and low power dissipation applications.
· Systems requiring robust signal integrity in challenging environments.