DESCRIPTION

· The FIN3385 and FIN3383 convert 28-bit parallel LVTTL data into four serial LVDS data streams, transmitting a phase-locked clock alongside.

· The FIN3386 and FIN3384 reverse the process, converting serial LVDS data back into 28/21-bit LVTTL data.

· These chipsets address EMI and cable size issues in high-speed TTL interfaces.

FEATURES

· Low power consumption.

· Supports shift clock frequencies from 20MHz to 85MHz.

· ±1V common-mode range around 1.2V.

· Narrow bus reduces cable size and cost.

· High throughput up to 2.38Gbps.

· Internal PLL requires no external components.

· Compatible with TIA/EIA-644 specification.

· Available in a 56-lead TSSOP package.

APPLICATIONS

· Flat panel display link systems.

· High-speed data transmission in constrained cable environments.

· Systems requiring reduced EMI and compact cable solutions.