DESCRIPTION

· The LTC6954 is a family of low phase noise clock distribution parts with three outputs, each featuring individually programmable frequency dividers and delays.

· The family includes four variants differing in output logic signal types: LTC6954-1 (three LVPECL outputs), LTC6954-2 (two LVPECL and one LVDS/CMOS outputs), LTC6954-3 (one LVPECL and two LVDS/CMOS outputs), and LTC6954-4 (three LVDS/CMOS outputs).

· Each output can divide the input frequency by any integer from 1 to 63 and delay each output by 0 to 63 input clock cycles, maintaining a 50% duty cycle.

· The LVDS/CMOS outputs are jumper selectable via the OUTxSEL pins for either LVDS or CMOS logic output.

· The device includes Linear Technology’s EZSync system for perfect clock synchronization and alignment, with all settings controlled through an SPI-compatible serial port.

FEATURES

· Low phase noise clock distribution suitable for high-speed/high-resolution ADC clocking.

· Additive jitter < 20fs RMS (12kHz to 20MHz) and < 85fs RMS (10Hz to Nyquist).

· Maximum input frequency of 1.8 GHz (LTC6954-1 when DELAY = 0) and 1.4 GHz (LTC6954-1 when DELAY > 0, LTC6954-2, -3, -4).

· EZSync™ clock synchronization compatibility.

· Three independent, low noise outputs with four output combinations available.

· Three independent programmable dividers covering integers from 1 to 63 and three independent programmable delays covering integers from 0 to 63.

· Junction temperature range from –40°C to 105°C.

APPLICATIONS

· Clocking high-speed, high-resolution ADCs, DACs, and data acquisition systems.

· Low jitter clock distribution.