DESCRIPTION

· The Si53320-28 family of LVPECL fanout buffers is designed for clock/data distribution and redundant clocking applications.
· These devices operate over a wide frequency range from DC to 1250 MHz and feature ultra-low jitter characteristics of 50 fs.
· Built-in LDOs enhance PSRR performance, reducing the need for external components and simplifying low-jitter clock distribution in noisy environments.
· Available in multiple configurations, some versions include a selectable input clock using a 2:1 input mux.
· These buffers can be paired with Si534x clocks and Si5xx oscillators for end-to-end clock tree performance.

FEATURES

· Ultra-low additive jitter: 50 fs rms.
· Built-in LDOs for high PSRR performance.
· Up to 10 LVPECL outputs.
· Accepts any-format inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS).
· Wide frequency range: DC to 1250 MHz.
· Output Enable option.
· Multiple configuration options.
· Dual Bank option.
· 2:1 Input Mux operation.
· RoHS compliant, Pb-free.
· Temperature range: -40 to +85 °C.

APPLICATIONS

· Clock/data distribution.
· Redundant clocking applications.
· Low-jitter clock distribution in noisy environments.
· End-to-end clock tree performance when paired with Si534x clocks and Si5xx oscillators.