DESCRIPTION

· The SN74V263, SN74V273, SN74V283, and SN74V293 are high-speed CMOS FIFO memories with clocked read and write controls.

· They feature flexible ×9/×18 bus matching on both read and write ports.

· These FIFOs are designed for applications requiring large data buffering and bus size matching.

FEATURES

· 166-MHz operation with 6-ns read/write cycle time.

· User-selectable input and output port bus sizing.

· Big-Endian/Little-Endian user-selectable byte representation.

· 5-V-tolerant inputs and fixed, low first-word latency.

· Zero-latency retransmit and master reset clears entire FIFO.

· Partial reset clears data but retains programmable settings.

· Empty, full, and half-full flags signal FIFO status.

· Programmable almost-empty and almost-full flags.

· Selectable synchronous/asynchronous timing modes for flags.

· Programmable flags by serial or parallel means.

· Select standard timing or first-word fall-through timing.

· Output enable puts data outputs in high-impedance state.

· Easily expandable in depth and width.

· Independent read and write clocks permit simultaneous reading and writing.

· High-performance submicron CMOS technology.

· Glueless interface with ’C6x DSPs.

· Available in 80-pin TQFP and 100-pin BGA packages.

APPLICATIONS

· Network, video, telecommunications, and data communications.

· Applications requiring large data buffering and bus size matching.