DESCRIPTION

· The 74HC138; 74HCT138 is a 3-to-8 line decoder/demultiplexer with inverting outputs.

· It decodes three binary weighted address inputs (A0, A1, A2) to eight mutually exclusive outputs (Y0 to Y7).

· Features three enable inputs (E1, E2, E3) for control and expansion.

· Can be used as an eight-output demultiplexer by utilizing enable inputs.

FEATURES

· Wide supply voltage range: 2.0 to 6.0 V.

· CMOS low power dissipation and high noise immunity.

· Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.

· Multiple input enable for easy expansion.

· Active LOW mutually exclusive outputs.

· Input levels: CMOS for 74HC138, TTL for 74HCT138.

· ESD protection: HBM exceeds 2000 V, CDM exceeds 1000 V.

· Specified from -40 °C to +125 °C.

APPLICATIONS

· Ideal for memory chip select decoding.

· Suitable for demultiplexing applications.

· Used in systems requiring 3-to-8 line decoding.

· Can be expanded to 1-of-32 decoder with additional ICs.