DESCRIPTION

· The ispClock 5500 Family is an In-System Programmable Clock Generator with Universal Fan-Out Buffer, designed for high-performance clock generation and distribution.

FEATURES

· Operates from 10MHz to 320MHz with low output skew (<50ps) and low jitter (<70ps).
· Features up to 20 programmable fan-out buffers supporting multiple output standards.
· Includes a fully integrated high-performance PLL with programmable lock detect and on-chip loop filter.
· Offers precision programmable phase adjustment per output with up to +/- 12ns skew range.
· Supports up to five clock frequency domains and flexible clock reference inputs.
· Equipped with four user-programmable profiles stored in E2CMOS memory.
· Provides full JTAG boundary scan test and in-system programming support.
· Available in commercial (0 to 70°C) and industrial (-40 to 85°C) temperature ranges.
· Packaged in 100-pin and 48-pin TQFP formats.

APPLICATIONS

· Ideal for circuit board common clock generation and distribution.
· Suitable for PLL-based frequency generation and high fan-out clock buffering.