DESCRIPTION

· The ispClock 5600 Family is an in-system programmable, zero-delay clock generator with a universal fan-out buffer, designed for high-performance clock generation and distribution.

FEATURES

· Operates from 10MHz to 320MHz with low output skew (<50ps) and low jitter (<60ps).

· Features up to 20 programmable fan-out buffers supporting various output standards and impedance settings.

· Includes a fully integrated PLL with programmable lock detect, multiply/divide ratios, and on-chip loop filter.

· Offers precision programmable phase adjustment per output with 16 settings and a skew range of up to +/- 12ns.

· Supports up to five clock frequency domains and flexible clock reference inputs.

· Equipped with four user-programmable profiles stored in E2CMOS memory and full JTAG boundary scan test support.

· Available in commercial and industrial temperature ranges, packaged in 100-pin and 48-pin TQFP.

APPLICATIONS

· Ideal for circuit board common clock generation and distribution.

· Suitable for PLL-based frequency generation and high fan-out clock buffering.

· Effective as a zero-delay clock buffer in various electronic systems.