Silicon Labs SI4463-C2A-GMR

View All RF Accessories by Silicon Labs

Part Number:
SI4463-C2A-GMR
Manufacturer:
Silicon Labs
Category:
RF Accessories
RoHs:
Non-RoHS Compliant
Datasheet:
Description:
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Specifications

Type

Paramete

Type

Paramete

Supplier Device Package

20-QFN (4x4)

Type

TxRx Only

RF Family/Standard

General ISM < 1GHz

Data Rate (Max)

1Mbps

Modulation

4GFSK, GFSK, GMSK, OOK

Serial Interfaces

SPI

Voltage - Supply

1.8V ~ 3.6V

Package / Case

20-VFQFN Exposed Pad

Power - Output

20dBm (Max)

Sensitivity

-129dBm

Current - Transmitting

44.5mA ~ 88mA

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Frequency

142MHz ~ 1.05GHz

GPIO

Current - Receiving

10.9mA ~ 13.7mA

Overview

Information of Si4463-C2A-GMR Sub-GHz Transceiver

Basic Overview

Product Type: High-performance, low-current sub-GHz transceiver (EZRadioPRO® family)
Manufacturer: Silicon Laboratories
Document Reference: Si4463/61/60-C (Rev. 1.0, 10/14)
Core Function: Wireless data transmission/reception in sub-GHz bands, supporting multiple modulation schemes for industrial, consumer, and smart metering applications
Key Features: 142–1050 MHz frequency range, -129 dBm receive sensitivity, +20 dBm max output power, low active current (10–13 mA RX, 85 mA TX @ +20 dBm), ultra-low powerdown modes (30 nA shutdown), IEEE 802.15.4g/WMBus compliant, 64-byte TX/RX FIFOs, integrated packet handler
Key Identifiers:

Core Specifications

1. RF Performance

Frequency and Modulation

Parameter	Specification
Frequency Range	142–175 MHz, 283–350 MHz, 350–525 MHz, 850–1050 MHz
Modulation Schemes	GFSK, FSK, 4GFSK, 4FSK, GMSK, OOK
Data Rate	100 bps – 1 Mbps (4(G)FSK), 100 bps – 120 kbps (OOK)
Frequency Resolution	4.7 Hz (142–175 MHz) to 28.6 Hz (850–1050 MHz)
Output Power Range	-20 dBm to +20 dBm (programmable, 0.25 dB step resolution near max power)

Receive Sensitivity (BER < 0.1% unless noted)

Condition	Sensitivity (Typ)	Unit
169 MHz, 500 bps, GFSK (Δf=±250 Hz, BT=0.5)	-129	dBm
169 MHz, 40 kbps, GFSK (Δf=±20 kHz, BT=0.5)	-110	dBm
915 MHz, 500 bps, GFSK (Δf=±250 Hz, BT=0.5)	-127	dBm
915 MHz, 40 kbps, GFSK (Δf=±20 kHz, BT=0.5)	-109	dBm
OOK, 4.8 kbps, 350 kHz BW	-110	dBm

Selectivity and Blocking

Parameter	Condition	Typ	Unit
Adjacent Channel Selectivity	±1-channel offset (12.5 kHz spacing), 169 MHz	-69	dB
Blocking Performance	1 MHz offset, 169 MHz	-79	dB
	8 MHz offset, 169 MHz	-86	dB
Image Rejection	With calibration, 169 MHz	60	dB

2. Electrical Characteristics

Power Consumption (VDD=3.3V, TA=25°C)

Mode	Condition	Typ	Max	Unit
Shutdown	SDN=1, registers cleared	30	1300	nA
Standby	Registers maintained, RC oscillator off	40	2900	nA
Sleep (RC Oscillator)	Wake-up timer enabled	740	3800	nA
RX (Low Power Mode)	315 MHz, 40 kbps	10.9	-	mA
RX (High Performance Mode)	915 MHz, 40 kbps	13.7	22	mA
TX	+20 dBm, 915 MHz (Class-E match)	88	108	mA
	+20 dBm, 169 MHz (Square-wave match)	68.5	80	mA
Preamble Sense Mode	1.2 kbps, 4-byte preamble	6	-	mA
	50 kbps, 5-byte preamble, 1s sleep interval	10	-	µA

Supply and Digital I/O

Parameter	Min	Typ	Max	Unit
Supply Voltage (VDD)	1.8	3.3	3.8	V
Input High Voltage (VIH)	0.7×VDD	-	VDD+0.3	V
Input Low Voltage (VIL)	-0.7	-	0.3×VDD	V
GPIO Drive Strength (Max)	-	-	6.66	mA (output low, LL drive)
Input Capacitance (CIN)	-	2	-	pF

3. Thermal Characteristics

Parameter	Value	Unit
Operating Ambient Temperature (TA)	-40 to +85	°C
Maximum Junction Temperature (TJ)	105	°C
Thermal Impedance (θJA)	25	°C/W
Storage Temperature (TSTG)	-55 to +150	°C

Functional Details

1. Key Operational Modes

Mode	Description	Transition Time (Typ)
Shutdown	Full power-off, registers lost	15 ms (to TX/RX)
Standby	Lowest current with register retention	440 µs (to TX/RX)
Sleep	Standby + wake-up timer (32 kHz clock)	440 µs (to TX/RX)
Ready	Crystal oscillator active, fast TX/RX transition	100 µs (to TX/RX)
TX/RX	Active transmission/reception	70 µs (TX↔RX, Zero-IF mode)
Preamble Sense	Duty-cycled RX for ultra-low power packet detection	-

2. Core Functional Blocks

RF Transceiver Chain

Receiver: Low-noise amplifier (LNA), I-Q mixer, programmable gain amplifier (PGA), ΔΣ ADC, digital modem with AGC/AFC
Transmitter: Fractional-N PLL synthesizer, Gaussian filter, +20 dBm PA with automatic ramp-up/down, single-ended TX output
Synthesizer: Fractional-N PLL with LC VCO, 28.6 Hz frequency resolution, 50 µs settling time

Data Handling

FIFOs: 64-byte TX/RX (129-byte dedicated for single direction) with programmable thresholds
Packet Handler: Autonomous preamble/sync word detection, CRC (configurable lengths), header checking, data whitening/Manchester encoding
Modem Features: Automatic Gain Control (AGC), Auto Frequency Correction (AFC), RSSI (0.5 dB resolution), image rejection calibration

Auxiliary Features

Wake-Up Timer: 32 kHz RC oscillator (calibrated) or external crystal, programmable interval
Sensors: Integrated temperature sensor (±2°C accuracy @25°C), low battery detector (50 mV resolution)
Antenna Diversity: Supports 2-antenna switching with integrated control algorithm
Preamble Sense Mode: Detects 1-byte preamble for low-power packet sniffing

3. Command and Control Interface

SPI Interface: 4-wire (SCLK, SDI, SDO, nSEL), up to 10 MHz clock rate
Interrupts: nIRQ pin for packet handler, chip status, and modem events
GPIOs: 4 programmable pins (GPIO0-3) for clock output, FIFO status, antenna diversity control, etc.
API: Embedded commands/properties for configuration (modulation, frequency, power, packet structure)

Package and Pin Configuration

1. Package Specifications (20-pin QFN)

Parameter	Min	Nom	Max	Unit
Body Size (D×E)	-	4.0×4.0	-	mm
Package Height (A)	0.80	0.85	0.90	mm
Pin Pitch (e)	-	0.50	-	mm
Lead Width (b)	0.18	0.25	0.30	mm
Exposed Pad Size (D2×E2)	2.45×2.45	2.60×2.60	2.75×2.75	mm

2. Key Pin Functions

Pin #	Symbol	Type	Function
1	SDN	I	Shutdown control (1=shutdown, 0=active)
2-3	RXp/RXn	I	Differential RF input to LNA
4	TX	O	Single-ended RF output (PA)
6,8	VDD	Power	Supply voltage (1.8–3.8 V)
7	TXRAMP	O	Ramp control for external PA
9-10	GPIO0-GPIO1	I/O	Programmable general-purpose I/O
11	nIRQ	O	Interrupt output (active low)
12-14	SCLK/SDO/SDI	I/O	SPI clock/output/input
15	nSEL	I	SPI chip select (active low)
16-17	XOUT/XIN	O/I	Crystal oscillator (25–32 MHz)
19-20	GPIO2-GPIO3	I/O	Programmable general-purpose I/O
PKG	PADDLE_GND	GND	Exposed ground pad (critical for thermal/electrical performance)

Application Guidelines

1. Typical Applications

Smart metering (IEEE 802.15.4g, WMBus)
Industrial control and telemetry
Home automation and security systems
Remote keyless entry, garage/gate openers
Sensor networks and health monitors
Electronic shelf labels

2. Key Design Considerations

RF Matching: Use Class-E match for 915 MHz, square-wave match for 169 MHz; TX/RX can be direct-tied for <17 dBm output
Power Supply: Decouple VDD with 100 nF and 1 µF capacitors near pins 6 and 8
Crystal: 30 MHz recommended (25–32 MHz supported), ensure proper load capacitance (programmable internal caps)
Thermal Management: Solder exposed ground pad to PCB ground plane for heat dissipation
Low Power: Use standby/sleep modes for battery-powered designs; preamble sense mode for ultra-low duty cycles

3. Compliance

Supports ETSI EN300 220 Category I (social alarms, healthcare)
WMBus compliant (EN13757-4), supports N modes (169 MHz)
FCC Part 90 (licensed bands) and Part 15.247/231/249 compliant

Ordering and Packaging

Part Number Element	Description
Si4463	Base model (max +20 dBm output)
-C2A	Revision and firmware variant
-GM	20-pin Pb-free QFN package
-R	Tape and reel packaging option

Complementary Variants

Si4461-C2A-GMR: +16 dBm max output (43 mA TX @ +16 dBm)
Si4460-C2A-GMR: +13 dBm max output (24 mA TX @ +13 dBm)

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