DESCRIPTION

· Single positive-edge-triggered D-type flip-flop for 1.65 V to 5.5 V VCC operation.
· NanoFree™ package technology uses the die as the package.
· Preset (PRE) or clear (CLR) input sets or resets outputs regardless of other input levels.
· Data at D input transfers to outputs on positive-going edge of clock pulse when PRE and CLR are inactive.
· Fully specified for partial-power-down applications using Ioff.

FEATURES

· Available in Texas Instruments NanoFree™ package.
· Supports 5 V VCC operation.
· Inputs accept voltages up to 5.5 V.
· Maximum tpd of 5.9 ns at 3.3 V.
· Low power consumption, 10 μA maximum ICC.
· ±24 mA output drive at 3.3 V.
· Ioff supports live insertion, partial-power-down mode, and back-drive protection.
· ESD protection exceeds JESD 22 standards.

APPLICATIONS

· Servers.
· LED displays.
· Network switches.
· Telecom infrastructure.
· Motor drivers.
· I/O expanders.