Infineon EiceDRIVERTM 2EDS8265HXUMA1
Reinforced-Isolated 4 A / 8 A Dual-Channel Gate-Driver IC
Datasheet Extract – Rev. 2.9 (2024-05-16)

1. Ordering & Product Identification• Orderable Part Number (OPN): 2EDS8265HXUMA1• Device Marking: 2S8265B• Package: PG-DSO-16-30 (wide-body SOIC-16, 10.3 mm × 10.3 mm)• Pb-free / RoHS-compliant; qualified to JEDEC industrial standard
2. Core Features• Dual-channel, reinforced galvanic isolation (coreless-transformer technology)• 4 A peak source / 8 A peak sink output current per channel• Ultra-fast propagation delay: 37 ns typ. (31 ns min, 44 ns max)• 3 ns max channel-to-channel mismatch• CMTI > 150 V/ns (static & dynamic)• PWM switching capability up to 10 MHz• Rail-to-rail output with active Miller-clamp strength (5 A reverse-current capability)• UVLO protection on both input and output sides– Input-side UVLO: 2.85 V typ. turn-on / 2.70 V turn-off– Output-side UVLO: 8.0 V typ. turn-on / 7.0 V turn-off (8 V class)• Safety turn-off when VDDI < 3 V or DISABLE pin = HIGH• Wide temperature range: –40 °C … +150 °C (Tj), –40 °C … +125 °C (Tamb)
3. Safety & Isolation Certifications• DIN V VDE V 0884-10 (reinforced):– VIOTM = 8 kVpk (qualification, 60 s); 10 kVpk production test (1 s)– VIORM = 1.42 kVpk / VIOWM = 1 kVrms– VIOSM = 6.25 kVpk surge (sample test 10 kVpk)• UL1577 Ed. 5: Viso = 5.7 kVrms (1 min qualification; 6.84 kVrms 1 s production)• IEC 62368-1 / EN 62368-1 & GB 4943.1-2022 system certification (VDE & CQC)• Clearance / creepage: 8.0 mm min input-to-output; 2.5 mm channel-to-channel• CTI 400-600; Material Group I; Pollution Degree 2; Over-voltage Cat. II/III/IV up to 600 Vrms mains
4. Electrical Ratings (absolute max)• VDDI: –0.3 V … 4.0 V (higher possible when internal SLDO active)• VDDA/VDDB: –0.3 V … 22 V• OUTA/OUTB: –0.3 V … VDDO+0.3 V (–2 V … VDDO+1.5 V <200 ns transient)• Input pins INA, INB, DISABLE: –0.3 V … 17 V (–5 V <50 ns)• Peak reverse current at outputs: ±5 A (<500 ns)• ESD: 2 kV HBM / 0.5 kV CDM• Non-destructive CMTI: 400 V/ns
5. Operating Range• VDDI: 3.0 V … 3.5 V (3.3 V nominal; SLDO allows 3.5 V…20 V with external Rs)• VDDA/VDDB: 4.5 V … 20 V (UVLO 8 V class)• Tamb: –40 °C … +125 °C (continuous; derate power above 125 °C)• Tj: –40 °C … +150 °C
6. Static Output Characteristics (4 A / 8 A version, 25 °C)• Ron_SRC: 0.85 Ω typ (0.42 Ω min, 1.6 Ω max) @ 50 mA• Ron_SNK: 0.35 Ω typ (0.18 Ω min, 0.75 Ω max) @ 50 mA• Peak source current: actively limited ≈ 5.2 A• Peak sink current: actively limited ≈ –10.2 A
7. Dynamic Performance (CLOAD = 1.8 nF, 25 °C)• Propagation delay (INA/INB → OUT): 37 ns typ• Rise time: 6.5 ns typ (12 ns max)• Fall time: 4.5 ns typ (8 ns max)• Minimum input pulse width that changes output: 18 ns typ• DISABLE shut-down delay: <100 ns• Start-up time: 7 µs (VDDI), 5 µs (VDDA/VDDB)• Shut-down time: 255 ns (VDDI), 110 ns (VDDA/VDDB)
8. Power Consumption (per channel, no load)• VDDI quiescent: 1.4 mA typ• VDDA/VDDB quiescent: 0.6 mA typ (OUT=low, 8 V UVLO)• Load-dependent current scales with fSW, Qg and RG (see datasheet figures)
9. Thermal Data (WB package, JEDEC high-K)• RthJA: 59 K/W• RthJC(top): 32 K/W• RthJB: 33 K/W• Safety-limiting values (Tj = 150 °C, Tamb = 25 °C):– Input chip: 20 mW– Each output: 1.05 W– Total: 2.12 W / 87.5 mA @ 12 V; 53.5 mA @ 20 V
10. Pin Configuration (PG-DSO-16-30, top view)1 INA2 INB3 VDDI4 GNDI5 DISABLE6 NC7 NC8 SLDON (tie to GNDI to enable SLDO)9 GNDB10 OUTB11 VDDB12 NC (isolation slot)13 NC14 GNDA15 OUTA16 VDDA
11. Typical Applications• Secondary-side control of high-voltage SJ-MOSFETs / SiC / GaN in LLC, PS-ZVS, active-clamp flyback• Primary-side synchronous rectification drivers• Server & telecom SMPS, EV charging, industrial drives, UPS, battery-storage systems• Reinforced-isolated ½-bridge or full-bridge topologies up to 1 kV DC bus