DESCRIPTION

· The 74AUP1G885 is a low-power dual function gate with outputs 1Y and 2Y determined by inputs A, B, and C.

· Output 1Y provides the Boolean function: 1Y = A × C.

· Output 2Y provides the Boolean function: 2Y = A × B + A × C.

· Features Schmitt-trigger action for tolerance to slower input rise and fall times.

· Ensures low static and dynamic power consumption across a VCC range of 0.8 V to 3.6 V.

· Fully specified for partial power-down applications using IOFF circuitry.

FEATURES

· Wide supply voltage range: 0.8 V to 3.6 V.

· CMOS low power dissipation and high noise immunity.

· Low static power consumption: ICC = 0.9 µA (maximum).

· Overvoltage tolerant inputs up to 3.6 V.

· Low noise overshoot and undershoot < 10% of VCC.

· IOFF circuitry enables partial power-down mode operation.

· Latch-up performance exceeds 100 mA per JESD78 Class II.

· Complies with multiple JEDEC standards and offers robust ESD protection.

· Available in multiple package options and specified for -40 °C to +125 °C.

APPLICATIONS

· Suitable for low-power and battery-operated devices.

· Ideal for applications requiring noise immunity and overvoltage tolerance.

· Used in systems with partial power-down requirements.

· Applicable in environments with varying temperature conditions.