CY25404ZXI241 – Comprehensive Model Information
(Extracted from Cypress/Infineon Datasheet & Ordering Guide)

1. Official Part-Number Breakdown CY25404ZXI-241└─➤ CY25404 – Base device: Quad-PLL programmable clock generator with spread-spectrum└─➤ Z – Package type: 20-pin TSSOP (4.4 mm body, lead-free)└─➤ X – Temperature grade: Industrial (-40 °C to +85 °C)└─➤ I – Production flow: Industrial temperature & Pb-free└─➤ -241 – Factory-customer code (pre-programmed frequency table #241, taped & reel)

2. Device Family Title

CY25404 – Quad-PLL Programmable Clock Generator with Spread-Spectrum

3. Key Features (Pre-Programmed in -241 Configuration)

• Four independent fractional-N PLLs (3 MHz – 166 MHz output)
• Input reference: 8 – 48 MHz crystal or 8 – 166 MHz external clock
• Nine differential-/single-ended clock outputs grouped in 3 banks
• Spread-spectrum modulation (PLL3 & PLL4):
– Center-spread: ±0.125 % – ±2.5 %
– Down-spread: –0.25 % to –5 %
– Lexmark or linear profile, pin-controlled (SSON)
• Glitch-free frequency switching via 3 FS pins (8 frequency sets)
• Output-enable (OE) pin for low-power standby
• Programmable output drive strength (4 levels) & independent bank supply (1.8 V / 2.5 V / 3.0 V / 3.3 V)
• One-time programmable (OTP) – no further field reprogramming

4. Absolute Maximum Ratings

VDD, VDD_CLK_Bx  . . . . . . . . . –0.5 V to +4.5 V
Input voltage . . . . . . . . . . . . . . . –0.5 V to VDD+0.5 V
Storage temperature . . . . . . . . . –65 °C to +150 °C
ESD HBM . . . . . . . . . . . . . . . . . . 2 kV
MSL (Moisture Sensitivity) . . . . . 3

5. Recommended Operating Conditions (Industrial Grade)

VDD core supply . . . . . . . . . . . . 2.25 V – 3.60 V
Output-bank supplies . . . . . . . . 1.71 V – 3.60 V (independent of VDD)
Ambient temperature . . . . . . . . . –40 °C to +85 °C
Max load capacitance . . . . . . . . 15 pF
Power-up ramp monotonic . . . . 0.05 – 500 ms

6. AC Performance Summary (Typical, CLOAD = 15 pF)

Output frequency range
– 1.8 V bank . . . . . . . . . . . . . . 3 – 50 MHz
– 2.5 V / 3.0 V / 3.3 V banks . . 3 – 166 MHz
Rise/fall times (20 %–80 %)
– Low drive . . . . . . . . . . . . . . . 6.8 ns
– High drive . . . . . . . . . . . . . . . 1.0 ns
Cycle-to-cycle jitter . . . . . . . . . . < 100 ps (config. dependent)
PLL lock time . . . . . . . . . . . . . . 1 – 3 ms
Output duty cycle . . . . . . . . . . . 45 % – 55 % (50 % typ)

7. Pinout (20-Pin TSSOP – Top View)

1  VDD           2  XOUT          3  XIN/EXCLKIN   4  VSS
5  CLK1          6  VDD_CLK_B1    7  CLK2          8  VSS
9  CLK3/FS0     10  OE/FS1       11  CLK4/FS2     12  CLK5
13 VSS          14  CLK6          15  VDD_CLK_B2   16  CLK7/SSON
17 VDD_CLK_B3   18  CLK8          19  VSS          20  CLK9

8. Ordering & Shipping Options

Standard orderable code: CY25404ZXI-241T
Package: 20-pin TSSOP, tape & reel (2 000 pcs / reel)
Lead-free & RoHS compliant
Temperature: Industrial (-40 °C to +85 °C)
Factory pre-programmed – contact Infineon/Cypress for custom profiles