LC749402BG-TLM-H LCD Picture Quality Improvement IC Product Information Summary

1. General Description

The LC749402BG-TLM-H is a high-performance LCD picture quality improvement IC developed by ON Semiconductor. It processes output signals for LCD panels to deliver enhanced display quality, supporting up to WVGA/SVGA panels (max 896 horizontal dots, 768 vertical lines) with an operating frequency of 40 MHz or less. The device integrates comprehensive image quality correction functions for YCbCr/YPbPr, RGB, and Y signals, along with a built-in panel driver timing controller and backlight control PWM. It features digital input/output (24-bit YCbCr/RGB, 16-bit 4:2:2, 8-bit ITU-R BT.656) and communicates via I²C or 4-wire SIO interface. Housed in a 96-lead FBGA package (6.0×6.0 mm), it operates over a temperature range of -40 °C to +85 °C, making it ideal for LCD display equipment requiring precise image adjustment and low-power operation.

2. Core Features and Benefits

2.1 Image Quality Correction

• Y Signal Enhancement: Luminance adjustment, contour correction, Color Depth Expander (CDEX), dynamic-γ correction, and black/white stretch.
• Color Signal Optimization: Color exciter, flesh tone correction, hue adjustment, and color gain control for YCbCr/YPbPr signals.
• RGB Signal Tuning: Brightness, contrast, white balance, black balance, and γ correction for RGB inputs.
• Dithering Function: Reduces quantization noise for smoother gradient transitions.

2.2 Signal Input/Output Flexibility

• Digital Inputs: Supports 24-bit YCbCr/YPbPr (4:4:4), 16-bit YCbCr (4:2:2), 8-bit ITU-R BT.656, and 24-bit RGB signals.
• Digital Outputs: Provides 18-bit/24-bit RGB and 16-bit (4:2:2)/24-bit (4:4:4) YCbCr signals.
• OSD Mixing: Integrates OSD (On-Screen Display) mixing functionality for overlay graphics.

2.3 Panel Control & Protection

• Built-in TCON: Timing controller for panel driver synchronization (horizontal/vertical sync, data enable, strobe signals).
• Panel Protection: Generates protection timing signals to prevent panel damage.
• Backlight Control: PWM output for video-adaptive backlight dimming, reducing power consumption.

2.4 System Compatibility

• Dual Interface Support: I²C (slave mode) and 4-wire SIO for register configuration.
• Flexible Power Supplies: Core voltage (1.0–1.3 V) and I/O voltage (1.7–1.9 V or 2.6–3.6 V) to match system requirements.
• Low Power Consumption: Static supply current of 20 μA (typ) and dynamic current of 18 mA (10 MHz) to 57 mA (40 MHz).

3. Applications

• LCD display equipment (monitors, TVs, industrial displays)
• Portable LCD devices (tablets, portable media players)
• Automotive LCD displays (infotainment systems, instrument clusters)
• Industrial control panels and medical LCD monitors

4. Key Electrical Specifications

4.1 Absolute Maximum Ratings (Ta=25 °C, DVSS=0 V, AVSS_OSC=0 V)

4.2 Recommended Operating Conditions (Ta=-40 to +85 °C, DVSS=0 V, AVSS_OSC=0 V)

4.3 DC Characteristics (Ta=-40 to +85 °C)

4.4 Timing Characteristics

4.4.1 Input Timing

4.4.2 Output Timing

5. Pin Configuration and Description (96-Lead FBGA Package)

5.1 Key Pin Categories

5.2 Critical Pin Notes

• RC_BIAS (B1): Connect to GND with a 20 kΩ resistor for bias configuration.
• TEST (D4): Normally connect to GND (built-in pull-down resistor).
• SIOSEL (G6): Select interface mode (LOW=I²C slave, HIGH=4-wire SIO).
• XTAL1 (K7): Clock input for panel protection and PWM generation; connect to GND if unused.
• Unused Input Pins: DCRIN[7:0], DYGIN[7:0], DCBIN[7:0] must be connected to GND when not in use.

6. Functional Operation

6.1 Image Processing Flow

1. Signal Input: Accepts RGB, YCbCr/YPbPr, or ITU-R BT.656 digital signals.
2. Quality Correction: Applies luminance, color, and RGB-specific adjustments (e.g., contour correction, white balance, γ tuning).
3. Color Space Conversion: Converts between YCbCr and RGB formats as needed.
4. OSD Mixing: Overlays OSD signals onto the main video stream.
5. Output Driving: Delivers corrected digital signals to the LCD panel, synchronized with timing controller outputs.

6.2 Panel Control

• Timing Controller: Generates horizontal/vertical sync (DHSO/DVSO), data enable (DDEO), and driver control signals (FLM, GRST, SP) for panel synchronization.
• Backlight Control: PWM output adapts to video content for low-power operation.
• Panel Protection: Generates protection timing signals to prevent overvoltage/overcurrent damage to the panel.

6.3 Interface Operation

• I²C Mode: Slave address selectable via SCS_I2SEL pin; supports register read/write for configuration.
• 4-Wire SIO Mode: Selected via SIOSEL pin; uses SCK_SCL (clock) and SRXD_SDA/STXD (data) for communication.

7. Package and Mechanical Specifications (96-Lead FBGA)

8. Application Guidelines

8.1 Power Supply Recommendations

• Decouple DVDD_IO, DVDD_CORE, and AVDD_OSC with 0.1 μF ceramic capacitors placed close to the pins.
• Ensure separate analog/digital ground planes connected at a single point to minimize noise.

8.2 Unused Pin Handling

• All unused input pins (DCRIN, DYGIN, DCBIN, etc.) must be tied to GND to avoid floating.
• TEST pin: Connect to GND for normal operation.
• PDWN pin: Connect to GND if power-down mode is not used.

8.3 PCB Layout Tips

• Route high-speed signals (DCKI, DCKO, data lines) with matched lengths to reduce skew.
• Keep power supply traces wide to minimize voltage drop.
• Isolate analog (AVDD_OSC, AVSS_OSC) and digital components to reduce interference.