DESCRIPTION

· The 74FCT38072S is a low skew, single input to two output clock buffer.

· It features best-in-class additive phase jitter of sub 50 fsec.

· Renesas offers a range of non-PLL and PLL based low skew output devices, including Zero Delay Buffers for clock synchronization.

FEATURES

· Low additive phase jitter RMS: 50fs.

· Extremely low skew outputs: 50ps.

· Low cost clock buffer solution.

· Available in 8-pin SOIC and 8-pin DFN, Pb-free packages.

· Supports input/output clock frequencies up to 200 MHz.

· Utilizes low power CMOS technology.

· Operating voltage range: 1.8V to 3.3V.

· Extended temperature range: -40°C to +105°C.

APPLICATIONS

· Ideal for applications requiring precise clock distribution and synchronization.

· Suitable for use in systems where low jitter and low skew are critical.

· Can be used in a variety of electronic devices operating within the specified voltage and temperature ranges.