DESCRIPTION

· The IDT74ALVC16835 is a 3.3V CMOS 18-bit universal bus driver with 3-state outputs, built using advanced dual metal CMOS technology.
· Data flow from A to Y is controlled by the output-enable (OE) input.
· The device operates in transparent mode when the latch-enable (LE) input is high.
· The A data is latched if the clock (CLK) input is held at a high or low logic level.
· If LE is low, the A data is stored in the latch flip-flop on the low-to-high transition of CLK.
· When OE is high, the outputs are in the high-impedance state.
· Designed with a ±24mA output driver, capable of driving moderate to heavy loads while maintaining speed performance.

FEATURES

· 0.5 MICRON CMOS Technology.
· Typical tSK(o) (Output Skew) < 250ps.
· ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0).
· VCC = 3.3V ± 0.3V, Normal Range; VCC = 2.7V to 3.6V, Extended Range; VCC = 2.5V ± 0.2V.
· CMOS power levels (0.4 μW typ. static).
· Rail-to-Rail output swing for increased noise margin.
· Available in TVSOP package.
· High Output Drivers: ±24mA, suitable for heavy loads.

APPLICATIONS

· SDRAM Modules.
· PC Motherboards.
· Workstations.
· Note: This part is obsolete and not recommended for new designs.