DESCRIPTION

· The LP2997 linear regulator is designed to meet JEDEC SSTL-18 specifications for DDR-II memory termination.
· It features a high-speed operational amplifier for excellent response to load transients.
· The output stage prevents shoot-through while delivering 500mA continuous current and transient peaks up to 900mA.
· Includes a VSENSE pin for superior load regulation and a VREF output as a reference for the chipset and DIMMs.
· Features an active low shutdown (SD) pin providing Suspend to RAM (STR) functionality, tri-stating the VTT output while keeping VREF active.

FEATURES

· Capable of sourcing and sinking current.
· Low output voltage offset.
· No external resistors required.
· Linear topology.
· Low external component count.
· Thermal shutdown.
· Available in SOIC-8 and SO PowerPAD-8 packages.

APPLICATIONS

· DDR-II termination voltage.
· SSTL-18 termination.