SLG5NT1477V Model Information

Product Name: SLG5NT1477V
Description: 9.8 mΩ, Nanopower Mobile 6 A Load Switch with Discharge
Datasheet Date: 2-Feb-2022
Revision: 1.29
Page: 1 of 12
©2022 Renesas Electronics Corporation

Key Features:

• 1.5 x 2.0 mm FC-TDFN 9L package (2 fused pins for drain and 2 fused pins for source)
• Logic level ON pin capable of supporting 0.85 V CMOS Logic
• Discharged Load when off
• Fast Turn On time
• Low RDSON while supporting 6 A
• Pb-Free / Halogen-Free / RoHS compliant
• Operating Temperature: -40 °C to 85 °C
• Operating Voltage: 3.0 V to 5.25 V

Pin Configuration:

• VDD: PWR VDD power for load switch control (3.0 V to 5.25 V)
• D: MOSFET Drain of Power MOSFET (fused pins)
• S: MOSFET Source of Power MOSFET (fused pins)
• GND: GND Ground
• ON: Input Turns MOSFET ON (4 MΩ pull down resistor) CMOS input with ON_VIL < 0.2 V, ON_VIH > 0.85 V

Ordering Information:

• Part Number: SLG5NT1477V
• Package Type: FC-TDFN 9L
• Production Flow: Industrial, -40 °C to 85 °C
• Tape and Reel Version: SLG5NT1477VTR

Absolute Maximum Ratings:

• VDD Power Supply: --7 V
• TS Storage Temperature: -65 to -150 °C
• ESDHBM ESD Protection Human Body Model: 2000 V
• MSL Moisture Sensitivity Level: 1
• WDIS Package Power Dissipation: --1.0 W
• MOSFET IDSPK Peak Current from Drain to Source: For no more than 1 ms with 1% duty cycle --9 A

Electrical Characteristics:

• VDD Power Supply Voltage: -40 °C to 85 °C 3.0 - 5.25 V
• IDD Power Supply Current: when OFF, TA = 25 °C -30 60 nA; when ON, No load, ON = VDD, TA = 25 °C -35 70 nA
• RDSON ON Resistance: TA = 25 °C; IDS = 300 mA, VDD - VD = 1.5 V -16.2 18.6 mΩ to TA = 85 °C; IDS = 300 mA, VDD - VD = 4.0 V -11.96 13.78 mΩ
• MOSFET IDS Current from D to S Continuous: --6 A
• VD Drain Voltage: 0.85 -VDD - 1.5 V

Layout Guidelines:

1. VDD pin requires 0.1 µF and 10 µF external capacitors, located close to the SLG5NT1477V's PIN1.
2. D and S pins should have short, direct, and wide power traces, with a minimum width of 15 mils (0.381 mm) per Ampere.
3. Connect input CIN and output CLOAD low-ESR capacitors as close as possible to the SLG5NT1477V's D and S pins.
4. GND pin should be connected to system analog or power ground plane.
5. 2 oz. copper is recommended for high current operation.

Package Information:

• 9 Lead TDFN FC Package 1.5 x 2.0 mm (Fused Lead) JEDEC MO-252, Variation W2015D

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• Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners.

Contact Information:

• For further information, visit www.renesas.com/contact-us/.

Disclaimer:

• Renesas Electronics Corporation provides technical specifications, reliability data, design resources, application advice, web tools, safety information, and other resources "as is" with all faults, and disclaims all warranties, express or implied. These resources are intended for developers designing with Renesas products and are subject to change without notice.