Renesas DAC1653D1G5NLGA

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  • Part Number:

    DAC1653D1G5NLGA

  • Manufacturer:

    Renesas

  • Category:

    Digital to Analog Converters (DAC)

  • RoHs:

    rohs RoHS Compliant

  • Datasheet:

    pdf DAC1653D1G5NLGA_Datesheet

  • Description:

    IC DAC 16BIT A-OUT 56VFQFPN

  • In stock 0
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Specifications
Type
Paramete
Type
Paramete
Package / Case
56-VFQFN Exposed Pad
Differential Output
Yes
Number of D/A Converters
2
Architecture
Oversampling Interpolating DAC
Reference Type
External, Internal
Mounting Type
Surface Mount
Number of Bits
16
Output Type
Current - Unbuffered
Settling Time
20ns (Typ)
Voltage - Supply, Digital
1.14V ~ 1.26V
Grade
-
Supplier Device Package
56-VFQFPN (8x8)
Data Interface
JESD204B
INL/DNL (LSB)
-
Qualification
-
Voltage - Supply, Analog
1.14V ~ 1.26V, 2.7V ~ 3.45V
Operating Temperature
-40°C ~ 85°C
Overview

DESCRIPTION

· DAC1653D and DAC1658D are high-speed, high-performance 16-bit dual channel Digital-to-Analog Converters (DACs).

· They support sample rates up to 2 Gsps with selectable ×2, ×4, and ×8 interpolation filters.

· These devices are optimized for multi-carrier and broadband wireless transmitters.

· They feature a JESD204B compatible high-speed serial input data interface running up to 10 Gbps.

· The DAC165xD series includes two versions: DAC1653D with low common-mode output voltage and DAC1658D with high common-mode output voltage.



FEATURES

· Easier PCB layout, lower radiated noise, and lower pin count compared to traditional parallel interfaces.

· Self-synchronous link with skew compensation and deterministic latency.

· Supports Multiple Device Synchronization (MDS) and harmonic clocking.

· Includes an optional on-chip digital modulator with a 40-bit Numerically Controlled Oscillator (NCO).

· Features 13-bit phase adjustment, 12-bit digital gain, and 16-bit digital offset for full control of analog output signals.

· Available in a VFQFP-N 56 package (8 mm × 8 mm).



APPLICATIONS

· Ideal for LTE and LTE-A MIMO transceiver applications.

· Suitable for multi-carrier and broadband wireless transmitters.

· Effective in systems requiring deterministic and repeatable interface latency.

· Useful in scenarios demanding harmonic clocking to reduce system-level clock synthesis and distribution challenges.

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